+86 755-83044319

Technical Blogs

/
/

Simulation integrated circuit design process -layout design basis (2)

release time:2022-03-17Author source:SlkorBrowse:6158



  Because the inverter layout design is simple and the number of devices is very small, the demonstration at the back of this article still uses the Layout L tool. You can experiment with the Layout XL tool yourself.

After switching in NMOS and PMOS transistors, select the device, and press the shortcut key Q to edit the device attributes according to the dimensions in the schematic diagram, so that the W and L of the MOS tube are consistent with those in the schematic diagram.

The relationship between the number of Fingers and the Finger Width, as long as the Total Width of the device is consistent with the design value.

The device calling PDK can also choose whether to add Gate Connection and whether to connect source and drain (S/D Connection, which is only useful for multi-interdigital structure). The functions provided by these PDK allow users to draw the layout conveniently.

The devices with adjusted size and layout are shown in the figure. Next, start connecting devices, select M1 in LWS column, then use shortcut key P or R to complete the connection between MOS tubes, reserve the lines of AVDD and AVSS at the upper and lower positions respectively, and finally use shortcut key L to name the connection nodes (use txt layer corresponding to metal, for example, M1TXT layer). After completing the above steps, the layout should look similar to the screenshot below.

The remaining content, which may not be easy to understand, and is easily overlooked by many beginners, is to add substrate contact to NMOS and PMOS. So what is substrate contact?

We all know that MOS is a four-terminal device. This can also be noticed in the schematic diagram. The substrate contact in the layout is the fourth terminal of MOS, which is the substrate of the whole chip for NMOS (only for standard CMOS technology) and NWell for PMOS. Therefore, the substrate contact of NMOS is made on p plus, and the substrate contact of PMOS is made on NWell. The realization of substrate contact can also be clearly seen in the cross-sectional view of inverter.    


 
 

After completing the above steps, you can select: Edit->Advanced->Move Origin in the layout design interface, and select the coordinate origin of the layout, which will be more convenient when you need to call it later.




Disclaimer: This article is reproduced from "EETOP". This article only represents the author's personal views, and does not represent the views of Sacco Micro and the industry. It is only for reprinting and sharing to support the protection of intellectual property rights. Please indicate the original source and author when reprinting. If there is any infringement, please contact us to delete it.

Company Tel: +86-0755-83044319
Fax/fax:+86-0755-83975897
Email: 1615456225@qq.com
QQ: 3518641314 Manager Li
QQ: 332496225 Manager Qiu
Address: Room 809, Block C, Zhantao Technology Building, No.1079 Minzhi Avenue, Longhua New District, Shenzhen


Application recommendation

Service hotline

+86 0755-83044319

Hall Effect Sensor

Get product information

WeChat

WeChat